Atmel ATmega328P Xplained Mini MEGA328P-XMINI MEGA328P-XMINI Data Sheet

Product codes
MEGA328P-XMINI
Page of 657
196
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
Atmel-8271H-AVR- ATmega-Datasheet_08/2014
20.11.5 UBRRnL and UBRRnH – USART Baud Rate Registers
• Bit 15:12 – Reserved
These bits are reserved for future use. For compatibility with future devices, these bit must be written to zero 
when UBRRnH is written.
• Bit 11:0 – UBRR[11:0]: USART Baud Rate Register
This is a 12-bit register which contains the USART baud rate. The UBRRnH contains the four most significant 
bits, and the UBRRnL contains the eight least significant bits of the USART baud rate. Ongoing transmissions 
by the Transmitter and Receiver will be corrupted if the baud rate is changed. Writing UBRRnL will trigger an 
immediate update of the baud rate prescaler.
Table 20-12.
UCPOLn Bit Settings
UCPOLn
Transmitted Data Changed (Output of 
TxDn Pin)
Received Data Sampled (Input on RxDn 
Pin)
0
Rising XCKn Edge
Falling XCKn Edge
1
Falling XCKn Edge
Rising XCKn Edge
Bit
15
14
13
12
11
10
9
8
UBRRn[11:8]
UBRRnH
UBRRn[7:0]
UBRRnL
7
6
5
4
3
2
1
0
Read/Write
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0