Atmel ATmega328P Xplained Mini MEGA328P-XMINI MEGA328P-XMINI Data Sheet

Product codes
MEGA328P-XMINI
Page of 657
203
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
Atmel-8271H-AVR- ATmega-Datasheet_08/2014
21.7
AVR USART MSPIM vs. AVR SPI
The USART in MSPIM mode is fully compatible with the AVR SPI regarding:
Master mode timing diagram.
The UCPOLn bit functionality is identical to the SPI CPOL bit.
The UCPHAn bit functionality is identical to the SPI CPHA bit. 
The UDORDn bit functionality is identical to the SPI DORD bit.
However, since the USART in MSPIM mode reuses the USART resources, the use of the USART in MSPIM 
mode is somewhat different compared to the SPI. In addition to differences of the control register bits, and that 
only master operation is supported by the USART in MSPIM mode, the following features differ between the two 
modules:
The USART in MSPIM mode includes (double) buffering of the transmitter. The SPI has no buffer.
The USART in MSPIM mode receiver includes an additional buffer level.
The SPI WCOL (Write Collision) bit is not included in USART in MSPIM mode.
The SPI double speed mode (SPI2X) bit is not included. However, the same effect is achieved by setting 
UBRRn accordingly.
Interrupt timing is not compatible.
Pin control differs due to the master only operation of the USART in MSPIM mode.
A comparison of the USART in MSPIM mode and the SPI pins is shown in 
Table 21-3.
Comparison of USART in MSPIM mode and SPI pins.
USART_MSPIM
 SPI
 Comment
TxDn
 MOSI
 Master Out only
RxDn
 MISO
 Master In only
XCKn
 SCK
 (Functionally identical)
(N/A)
 SS
 Not supported by USART in 
MSPIM