Atmel ATmega328P Xplained Mini MEGA328P-XMINI MEGA328P-XMINI Data Sheet
Product codes
MEGA328P-XMINI
42
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
Atmel-8271H-AVR- ATmega-Datasheet_08/2014
INT0 or INT1, or a pin change interrupt can wake up the MCU. This sleep mode basically halts all generated
clocks, allowing operation of asynchronous modules only.
clocks, allowing operation of asynchronous modules only.
Note:
If a level triggered interrupt is used for wake-up from Power-down, the required level must be held long enough for
the MCU to complete the wake-up to trigger the level interrupt. If the level disappears before the end of the Start-up
Time, the MCU will still wake up, but no interrupt will be generated.
the MCU to complete the wake-up to trigger the level interrupt. If the level disappears before the end of the Start-up
Time, the MCU will still wake up, but no interrupt will be generated.
. The start-up
time is defined by the SUT and CKSEL Fuses as described in
When waking up from Power-down mode, there is a delay from the wake-up condition occurs until the wake-up
becomes effective. This allows the clock to restart and become stable after having been stopped. The wake-up
period is defined by the same CKSEL Fuses that define the Reset Time-out period, as described in
becomes effective. This allows the clock to restart and become stable after having been stopped. The wake-up
period is defined by the same CKSEL Fuses that define the Reset Time-out period, as described in
.
10.6
Power-save Mode
When the SM2...0 bits are written to 011, the SLEEP instruction makes the MCU enter Power-save mode. This
mode is identical to Power-down, with one exception:
mode is identical to Power-down, with one exception:
If Timer/Counter2 is enabled, it will keep running during sleep. The device can wake up from either Timer
Overflow or Output Compare event from Timer/Counter2 if the corresponding Timer/Counter2 interrupt enable
bits are set in TIMSK2, and the Global Interrupt Enable bit in SREG is set.
Overflow or Output Compare event from Timer/Counter2 if the corresponding Timer/Counter2 interrupt enable
bits are set in TIMSK2, and the Global Interrupt Enable bit in SREG is set.
If Timer/Counter2 is not running, Power-down mode is recommended instead of Power-save mode.
The Timer/Counter2 can be clocked both synchronously and asynchronously in Power-save mode. If
Timer/Counter2 is not using the asynchronous clock, the Timer/Counter Oscillator is stopped during sleep. If
Timer/Counter2 is not using the synchronous clock, the clock source is stopped during sleep. Note that even if
the synchronous clock is running in Power-save, this clock is only available for Timer/Counter2.
Timer/Counter2 is not using the asynchronous clock, the Timer/Counter Oscillator is stopped during sleep. If
Timer/Counter2 is not using the synchronous clock, the clock source is stopped during sleep. Note that even if
the synchronous clock is running in Power-save, this clock is only available for Timer/Counter2.
10.7
Standby Mode
When the SM2...0 bits are 110 and an external crystal/resonator clock option is selected, the SLEEP instruction
makes the MCU enter Standby mode. This mode is identical to Power-down with the exception that the
Oscillator is kept running. From Standby mode, the device wakes up in six clock cycles.
makes the MCU enter Standby mode. This mode is identical to Power-down with the exception that the
Oscillator is kept running. From Standby mode, the device wakes up in six clock cycles.