Intel Edison Breakout Board BB.AL.B Data Sheet
Product codes
BB.AL.B
Debug UART Errata
4
Debug UART Errata
The Intel® Edison board has a known error on all UARTs. When Edison goes into low power sleep, the UART internal
FIFO and interface is powered down. Therefore, a two-wire UART (Rx/Tx) will lose the first received character
whenever Edison is in sleep mode. In order to avoid this condition, when sleep mode is enabled, a four-wire UART
(Rx, Tx, CTS, and RTS) is required.
FIFO and interface is powered down. Therefore, a two-wire UART (Rx/Tx) will lose the first received character
whenever Edison is in sleep mode. In order to avoid this condition, when sleep mode is enabled, a four-wire UART
(Rx, Tx, CTS, and RTS) is required.
§
Intel® Edison Breakout Board
Hardware Guide
September 2014
12
Document Number: 331190-003