Intel E3-1105C AV8062701048800 Data Sheet

Intel

®

 Xeon

®

 and Intel

®

 Core™ Processors For Communications Infrastructure

May 2012

Datasheet - Volume 1 of 2

Document Number: 327405

-

001

79

See the appropriate Platform Design Guide for implementation details.

VCC_SENSE
VSS_SENSE

VCC_SENSE and VSS_SENSE provide an isolated, 

low impedance connection to the processor core 

voltage and ground. They can be used to sense or 

measure voltage near the silicon.

O

Analog

VCCIO_SENSE

VSS_SENSE_VCCIO

VCCIO_SENSE and VSS_SENSE_VCCIO provide an 

isolated, low impedance connection to the 

processor VCCIO voltage and ground. They can be 

used to sense or measure voltage near the silicon.

O

Analog

VCCSA_VCCSENCE
VCCSA_VSSSENCE

VCCSA_VCCSENCE and VCCSA_VSSSENCE provide 

an isolated, low impedance connection to the 

processor system agent voltage. It can be used to 

sense or measure voltage near the silicon.

O

Analog

PROC_SELECT#

This pin is for compatibility with future platforms. 
A pull-up resistor to V

CPLL

 is required if connected to the 

DF_TVS strap on the PCH. 

SA_DIMM_VREFDQ
SB_DIMM_VREFDQ

See the appropriate Platform Design Guide for 

implementation details. These signals are not used by 

the processor and are for future compatibility only. No 

connection is required. 

VCCIO_SEL

Voltage selection for VCCIO: This pin must be pulled 
high on the motherboard when using a dual rail voltage 
regulator, which will be used for future compatibility.

VCCSA_VID[0]

Voltage selection for VCCSA: his pin must have a pull 
down resistor to ground.

BPM[7:0]

Pull Up

VCCIO

65-165 Ω

PRDY#

Pull Up

VCCIO

65-165 Ω

PREQ#

Pull Up

VCCIO

65-165 Ω

TCK

Pull Down

VSS

5-15 kΩ

TDI

Pull Up

VCCIO

5-15 kΩ