Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
1023
Default: 00000000h
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RE
SE
RVED
RESE
RVE
D
_1
RES
E
T_COUNTER
MAX
_
OR_MIN
SOU
R
CE_FOR_P
E
R
FORMANCE_COUNTER
RESE
RVE
D
_2
PERFORMA
N
C
E_COUNTE
R_THRE
SHOLD_V
A
LUE
Bit
Range
Default &
Access
Field Name (ID): Description
31
0b
RW
RESERVED:
Programming note: This second performance counter is enabled by the
enable bit in the PCSRC1 bit 31.
30
0b
RW
RESERVED_1:
Reserved.
29
0b
RW
RESET_COUNTER:
This bit indicates when the counter will be reset.
1 = Reset after each frame, summing all events in the frame
0 = Reset after each event within the frame
28
0b
RW
MAX_OR_MIN:
This bit tells whether the stored counter value for an event is the
maximum or the minimum value. The previous value is used to do the compare.
0 = Stored value is the maximum latency
1 = Stored value is the minimum latency