Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
Intel
®
 Atom™ Processor E3800 Product Family
1056
Datasheet
15.7.10
iunit_PMCS_type (PMCS)—Offset 84h
Power Management Control/Status.
Access Method
Default: 00000000h
15.7.11
iunit_MSI_CAPID_type (MSI_CAPID)—Offset 90h
Message Signaled Interrupts Capability ID and Control Register
Access Method
Default: 00000005h
21
01h
RO
DSI: 
DEVICE_SPECIFIC_INITIALIZATION: Hardwired to 1 to indicate that special 
initialization of the camera controller is required before generic class device driver is to 
use it.
20:19
0h
RO
RSVD_20_19: 
Reserved
18:16
2h
RO
VS: 
VERSION: Indicates compliance with revision 1.1 of the PCI Power Management 
Specification.
15:8
90h
RO
NEXT_CAP: 
POINTER_TO_NEXT_CAPABILITY: Indicates the next item in the 
capabilities list.
7:0
01h
RO
CAPID: 
CAPABILITIES: SIG defines this ID is 01h for power management.
Bit 
Range
Default & 
Access
Description
Type: 
PCI Configuration Register
(Size: 32 bits)
PMCS: 
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RSVD_31_2
PS
Bit 
Range
Default & 
Access
Description
31:2
0h
RO
RSVD_31_2: 
Reserved
1:0
0h
RW
PS: 
POWER_STATE: Power management is implemented by writing to control registers 
in the PUNIT. This field may be programmed by the software driver, but no action is 
taken based on writing to this field.
Type: 
PCI Configuration Register
(Size: 32 bits)
MSI_CAPID: