Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
1145
15.8.34
reg_gpd_c_gpio_reg_gpio_di_debounce_cnt0_type
(gpd_c_gpio_reg_gpio_di_debounce_cnt0)—Offset 42Ch
Access Method
Default: 00000000h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
un
use
d
_re
g
_g
pio
_
di_de
b
ounc
emeth
o
d
re
g_g
p
io
_di_de
bo
unc
emeth
o
d
Bit
Range
Default &
Access
Description
31:24
0h
RW
unused_reg_gpio_di_debouncemethod:
Unused
23:0
0h
RW
reg_gpio_di_debouncemethod:
indicates for each input bit which debouncing
counter value is chosen: '00': debounce_cnt0, '01': debounce_cnt1, '10':
debounce_cnt2, '11': debounce_cnt3'
Type:
Memory Mapped I/O Register
(Size: 32 bits)
gpd_c_gpio_reg_gpio_di_debounce_cnt0:
ISPMMADR Type:
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference:
[B:0, D:3, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
re
g_
gp
io_d
i_d
eb
ou
n
ce
_
cn
t0
Bit
Range
Default &
Access
Description
31:0
0h
RW
reg_gpio_di_debounce_cnt0:
Indicates the period an input has to be stable before
passing its value to the output*