Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
1575
15.8.670 reg_inp_sys_csi_receiver_csi3_int_enable_type
(inp_sys_csi_receiver_csi3_int_enable)—Offset 80308h
Interrupt Enable
Access Method
Default: 00000000h
2
0h
RW/1C
sleep_mode_entry:
Set if DPHY enters ultra low power state
1
0h
RW/1C
err_init_timeout:
Set if Initialization timeout error occurs on DPHY data lanes
0
0h
RO
reserved_10:
Always set to 0
Bit
Range
Default &
Access
Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
inp_sys_csi_receiver_csi3_int_enable:
ISPMMADR Type:
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference:
[B:0, D:3, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
u
nus
ed
_
csi3_int_e
nab
le
er
r_
lin
e_syn
c
err_e
scap
e
er
r_data_time
out
err_fr
am
e_
data
er
r_
fr
am
e_
sy
nc
er
r_
id
er
r_
cr
c
no_e
cc_e
rr
err_e
cc_co
rr
err_e
cc_d
oub
le
er
r_con
trol
err_s
o
t_syn
c_hs
err_so
t_hs
sle
ep
_
m
ode
_exit
sl
ee
p
_
m
o
de
_
en
tr
y
er
r_init_timeout
ov
er
ru
n
Bit
Range
Default &
Access
Description
31:17
0h
RW
unused_csi3_int_enable:
Unused
16
0h
RW
err_line_sync:
Enable line sync error interrupt
15
0h
RW
err_escape:
Enable escape entry error interrupt
14
0h
RW
err_data_timeout:
Enable timeout error interrupt
13
0h
RW
err_frame_data:
Enable frame data error interrupt
12
0h
RW
err_frame_sync:
Enable frame sync error interrupt
11
0h
RW
err_id:
Enable data id error interrupt
10
0h
RW
err_crc:
Enable CRC error interrupt