Intel E3815 FH8065301567411 Data Sheet

 

Intel

®

 Atom™ Processor E3800 Product Family

Datasheet

1747

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Up to 400Mbits per second data rate using 4 parallel data lines.

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Transfers the data in 1 bit and 4 bit SD modes and SPI mode.

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Transfers the data in following UHS-I modes: HS ,DDR50 and SDR12/25.

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Cyclic Redundancy Check CRC7 for command and CRC16 for data integrity.

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Designed to work with I/O cards, Read-only cards and Read/Write cards.

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Supports Read wait Control, Suspend/Resume operation.

SDIO only validated with WIFI devices.

This section provides a very high level overview of the SD, SDIO, eMMC 4.5 
specification. Refer to the SD and eMMC specifications for complete details.

The SD Card bus has a single master, single slaves (card), synchronous topology (refer 
to 

). During initialization process commands are sent to the card, allowing 

the application to detect the card and assign logical addresses to the physical slot. All 
data communication in the Card Identification Mode uses the command line (CMD) 
only.

SD bus allows dynamic configuration of the number of data lines. After power up, by 
default, the SD Card will use only SD3_D[0] for data transfer. After initialization the 
host can change the bus width (number of active data lines). This feature allows easy 
trade off between hardware cost and system performance. Note that while DAT1-
SD3_D[3:1] are not in use, the SoC will tri-state those signals.