Intel E3815 FH8065301567411 Data Sheet

Intel

®

 Atom™ Processor E3800 Product Family

184

Datasheet

1.

Slew rate is to be interpreted as the cumulative edge rate across the specified range, (0.25VCC

HDA

 to 

0.75VCC

HDA

 load for rise and 0.75VCC

HDA

 to 0.25VCC

HDA

 load for fall), rather than instantaneous rate 

at any point within the transition range. 

All Intel HD Audio buffers should be capable of withstanding continuous exposure to the 
waveform shown in 

. It is recommended that these waveforms be used as 

qualification criteria against which the long term reliability of each device is evaluated. 

 list the parameters of the waveform. This level of robustness 

should be guaranteed by design; it is not intended that this waveform should be used 
as a production test. 

0.7VCC

HDA

 < 

V

O_HDA

 < VCC

HDA

(113.64/

VCC

HDA

) * 

(V

O_HDA

-

VCC

HDA

) * 

(V

O_HDA

+ 

0.4VCC

HDA

)

mA

(Test Point)

V

O_HDA

 = 

0.7VCC

HDA

-37.5VCC

HDA

mA

I

OL

Low Period of 
SCL Clock

VCC

HDA

 > V

O_HDA

 

>0.3VCC

HDA

9.38VCC

HDA

mA

0.3VCC

HDA

 > 

V

O_HDA

 > 

0.1VCC

HDA

31.27V

O_HDA

mA

0.3VCC

HDA

 > 

V

O_HDA

 >0

(178.57/

VCC

HDA

) * 

V

O_HDA 

* 

(VCC

HDA

-

V

O_HDA

)

mA

(Test Point)

V

O_HDA

= 0.3VCC

HDA

37.55VCC

HDA

mA

I

CL

Low Clamp 
Current

-3 < V

I_HDA

 < -1

-25 

+(V

I_HDA

+1)/

0.015

I

CH

High Clamp 
Current

VCC

HDA

+4 > V

I_HDA

 

> VCC

HDA

+1

25+(V

I_HDA

-

VCC

HDA

-1)/

0.015

Slew_r

Output rise 
Slew rate

0.25VCC

HDA

 to 

0.75VCC

HDA

0.5

1.5

V/ns

Slew 

rate 

(note1)

Slew_f

Output rise 
Slew rate

0.75VCC

HDA

 to 

0.25VCC

HDA

0.5

1.5

V/ns

Slew 

rate 

(note1)