Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
1897
Default: 0000h
Type:
Memory Mapped I/O Register
(Size: 16 bits)
Offset:
BAR Type:
PCI Configuration Register (Size: 32 bits)
BAR Reference:
[B:0, D:23, F:0] + 10h
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
er
r_
in
t
bo
ot_ter_int
b
oot_c
k_rcv
re
_tun
e
int_c
int_b
int_a
crd
_
int
cr
d
_
rm
crd
_
ins
bu
f_r
d
_
rd
y
bu
f_wr
_r
dy
dma_int
blk
_
g
ap_e
ven
t
tx
_
co
m
p
cmd
_
co
mp
Bit
Range
Default &
Access
Field Name (ID): Description
15
0b
RO
Error Interrupt (err_int):
If any of the bits in the Error Interrupt Status register are
set, then this bit is set. Therefore the Host Driver can efficiently test for an error by
checking this bit first. This bit is read only.
•
•
1 = Error
•
0 = No Error
14
0b
RW/1C
BOOT_TER_INT (boot_ter_int):
boot ter int
13
0b
RW/1C
BOOT_ACK_RCV (boot_ck_rcv):
boot ack rcv
12
0b
RO
Re-Tuning Event (re_tune):
This status is set if Re-Tuning Request in the Present
State register changes from 0 to 1. Host Controller requests Host Driver to perform re-
tuning for next data transfer. Current data transfer (not large block count) can be
completed without re-tuning.
•
•
1 Re-Tuning should be performed
•
0 Re-Tuning is not required
11
0b
RO
INT_C (int_c):
This status is set if INT_C is enabled and INT_C# pin is in low level.
Writing this bit to 1 does not clear this bit. It is cleared by resetting the INT_C interrupt
factor. Refer to the Shared Bus Control register.
•
•
1 = INT_C is detected
•
0 = No interrupt is detected
10
0b
RO
INT_B (int_b):
This status is set if INT_B is enabled and INT_B# pin is in low level.
Writing this bit to 1 does not clear this bit. It is cleared by resetting the INT_B interrupt
factor. Refer to the Shared Bus Control register.
•
•
1 = INT_B is detected
•
0 = No interrupt is detected
9
0b
RO
INT_A (int_a):
This status is set if INT_A is enabled and INT_A# pin is in low level.
Writing this bit to 1 does not clear this bit. It is cleared by resetting the INT_A interrupt
factor. Refer to the Shared Bus Control register.
•
•
1 = INT_A is detected
•
0 = No interrupt is detected