Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Electrical Specifications
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
203
Refer to 
 for TAP Signal Group DC specifications and 
 for TAP 
Signal Group AC specifications.
9.6.26
General AC Timing Diagrams
Note that the measurement of the differential waveform according to these diagrams 
would have to be made directly at the load at the end of the line. In a real system, this 
is not possible because the end of the line is at the input pad of the SoC silicon.
Figure 80. TAP Valid Delay Timing Waveform
T
JH
= TDI, TMS Hold Time
V = 0.5 * V
CCP
TCK
Signal
Tx
Ts
Th
V  Valid
V
T
JSU
= TDI, TMS Setup Time
Figure 81. Test Reset (TAP_TRST#), Async GTL Input and PROCHOT# Timing Waveform
T18 (TAP_TRST# Pulse Width)
V
T
q
T38 (PROCHOT# Pulse Width)
=
Tq