Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
603
14.10.169 CRCCTRLBLUEA—Offset 60058h
Pipe A CRC Color Channel Control Register
Access Method
Default: 00000000h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RE
SE
RVED
EXPECTE
D
_CRC
_V
ALUE
Bit
Range
Default &
Access
Field Name (ID): Description
31:23
0b
RW
RESERVED:
Write as zero
22:0
0b
RW
EXPECTED_CRC_VALUE:
Expected CRC Value for Color Channel. This is the value used
to generate the CRC error status and interrupt. Resultant CRC values are compared to
this register after the completion of a CRC calculation. Status indications are in the
PIPEASTAT register.
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RES
E
RVE
D
EX
PE
CT
E
D
_
C
R
C
_
V
AL
UE
Bit
Range
Default &
Access
Field Name (ID): Description
31:23
0b
RW
RESERVED:
Write as zero
22:0
0b
RW
EXPECTED_CRC_VALUE:
Expected CRC Value for Color Channel. This is the value used
to generate the CRC error status and interrupt. Resultant CRC values are compared to
this register after the completion of a CRC calculation. Status indications are in the
PIPEASTAT register.