Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
683
14.11.31 VIDEO_DIP_CTL_B—Offset 61170h
Video DIP Control for Pipe B
Access Method
Default: 20200900h
6
0b
RW
DISPLAYPORT_D_PORT_ENABLE_OVERRIDE:
Project: All Default Value: 0b
•
Value / Name / Description / Project
•
0b / Normal / Normal operation / All
•
1b / Override / DisplayPort D port enable override (controlled from
sml0alertb_gp60_mgpio4 pin) / All
5
0b
RW
DISPLAYPORT_C_PORT_ENABLE_OVERRIDE:
Project: All
Default Value: 0b
Value Name Description Project
0b Normal Normal operation All
1b Override DisplayPort C port enable override (controlled from sus_statb_gp61 pin) All
4
0b
RW
DISPLAYPORT_B_PORT_ENABLE_OVERRIDE:
Project: All
Default Value: 0b
Value Name Description Project
0b Normal Normal operation All
1b Override DisplayPort B port enable override (controlled from gp57_mgpio5 pin) All
3
0b
RW
DP_SDVO_HDMI_PIPE_ENABLE_OVERRIDE_FOR_DISPLAY_PIPE_B:
Project: All
Default Value: 0b
Value Name Description Project
0b Normal Normal operation All
1b Override DP/SDVO/HDMI pipe enable override for display pipe B (controlled from
gp74_batlowb pin) All
2
0b
RW
DP_SDVO_HDMI_PIPE_ENABLE_OVERRIDE_FOR_DISPLAY_PIPE_A:
Project: All
Default Value: 0b
Value Name Description Project
0b Normal Normal operation All
1b Override DP/SDVO/HDMI pipe enable override for display pipe A (controlled from
slp_s4b pin) All
1
0b
RW
CRT_LVDS_PIPE_ENABLE_OVERRIDE_FOR_DISPLAY_PIPE_B:
Project: All
Default Value: 0b
Value Name Description Project
0b Normal Normal operation All
1b Override CRT/LVDS pipe enable override for display pipe B (controlled from
susclk_gp62 pin) All
0
0b
RW
CRT_LVDS_PIPE_ENABLE_OVERRIDE_FOR_DISPLAY_PIPE_A:
Project: All
Default Value: 0b
Value Name Description Project
0b Normal Normal operation All
1b Override CRT/LVDS pipe enable override for display pipe A (controlled from slp_mb
pin) All
Bit
Range
Default &
Access
Field Name (ID): Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h