Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Mapping Address Spaces
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
75
4.2
IO Address Space
There are 64 KB + 3 bytes of IO space (0h-10002h) for accessing IO registers. Most IO 
registers exists for legacy functions in the PCU or for PCI devices, while some are 
claimed by the SoC Transaction Router for graphics and for the PCI configuration space 
access registers.
4.2.1
SoC Transaction Router IO Map
The SoC claims IO transactions for VGA/Extended VGA found in the display/graphics 
interface. It also claims the two 32-bit registers at port CF8h and CFCh used to access 
PCI configuration space.
4.2.2
IO Fabric IO Map
4.2.2.1
PCU Fixed IO Address Ranges
Below table shows the fixed IO space ranges seen by a processor. 
4.2.2.2
Variable IO Address Ranges
 shows the variable IO decode ranges. They are set using base address 
registers (BARs) or other similar means. Plug-and-play (PnP) software (PCI/ACPI) can 
use their configuration mechanisms to set and adjust these values.
Table 43. Fixed IO Ranges in the Platform Controller Unit (PCU)
Device
IO Address
Comments
8259 Master
20h-21h, 24h-25h, 
28h-29h, 2Ch-2Dh, 
30h-31h, 34h-35h, 
38h-39-, 3Ch-3Dh
8254s
40h-43h, 50h-53h
PS2 Control
60h, 64h
NMI Controller
61h, 63h, 65h, 67h
RTC
70h-77h
Port 80h
80h-83h
Init Register
92h
8259 Slave
A0h-A1h, A4h-A5h, A8h-
A9h, ACh-ADh, B0h-B1h, 
B4h-B5h, B8h-B9h, BCh-
BDh, 4D0h-4D1h
PCU UART
3F8h-3FFh
Reset Control
CF9h
Overlaps PCI IO registers
Active Power Management 
B2h-B3h