SBE HighWire HW400c/2 User Manual

 

HighWire HW400c/2 User Reference Guide Rev 1.0 

 
The T8110L can be programmed such that its local frame reference (LREF [3:2]) 

puts are used to generate all of the TDM bus clocks and syncs.  The T8110L Local 

 

in
Clock Reference Inputs have been assigned to the PTMC JN3 H.110 clock pins as 
shown in Table 13.

 

 
 

LREF2 PT_NETREF1 
LREF3 PT_NETREF2 

 

The defau
the event that the HW400c
have an H.110 bus or the H.110 interface is not installed, the CT_EN pin on J4 (pin 

) 

The state of the C

red

D 

BSR r

 (see 4.2.2).  If H.110 is not present, the H.110 

interfa

abled.  

 
Even 

ble on the

ctPCI b

al CT 

Bus connections are still valid and therefore PTMC Site A and PTMC Site B can 
comm

is local to 

400c/2

 

itch connects to the various devices on 

 Gigabit Ethernet ports with integral 

MAC/PHYs, and four additional Gigabit MACs with external RGMII connections.  

 

lt HW400c/2 configuration has the H.110 interface installed. However, in 

/2 board is used in a PICMG 2.16 chassis that does not 

C23 is not grounded.  

T_EN pin is sto

 in bit 7 of the CPL

egister for access by software

ce should not be en

if the H.110 bus is not availa

 Compa

ackplane, the loc

unicate via the CT Bus that 

the HW

 board. 

The Broadcom BCM5388 Layer 2 Ethernet sw
the HW400c/2 board.  The BCM5388 has four

Three of the additional MACs are connected to Broadcom BCM5461S external 
PHYs, and one is connected directly to the MV64462 MAC port as shown in Table 
14. 
 

7 

MV64462 System Controller 

N/A 

MAC-to-MAC RGMII 

6 

Front Panel RJ-45 

00110 

1 External PHY 

2 

PT5MC Slot A, Link Port A 

N/A 

1 Integral PHY 

4 

Y 

PT5MC Slot A, Link Port B 

00100 

1 External PH

3 

PT5MC Slot B, Link Port A 

N/A 

1 Integral PHY 

5 

PT5MC Slot B, Link Port B 

00101 

1 External PHY 

0 

PSB Link Port A 

N/A 

1 Integral PHY 

1 

PSB Link Port B 

N/A 

1 Integral PHY 

 

October 10, 2006 

Copyright 2006, SBE, Inc. 

Page 

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