Delta Tau GEO BRICK LV User Manual
Geo Brick LV User Manual
PinOuts and Software Setup
90
Channel Control Registers
X:$78Bn0, X:$78Bn4, X:$78Bn8, X:$78BnC
where: n=2 for axes 1-4
n=3 for axes 5-8
Channel 1 X:$78B20 Channel 5 X:$78B30
Channel 2 X:$78B24 Channel 6 X:$78B34
Channel 3 X:$78B28 Channel 7 X:$78B38
Channel 4 X:$78B2C Channel 8 X:$78B3C
Channel 2 X:$78B24 Channel 6 X:$78B34
Channel 3 X:$78B28 Channel 7 X:$78B38
Channel 4 X:$78B2C Channel 8 X:$78B3C
Each channel has its own Serial Encoder Command Control Register defining functionality parameters.
Parameters such as setting the number of position bits in the serial bit stream, enabling/disabling channels
through the SENC_MODE (when this bit is cleared, the serial encoder pins of that channel are tri-stated),
enabling/disabling communication with the encoder using the trigger control bit.
23 22
[21:16]
15 14
13
12
11
10
[9:6]
[5:0]
Command
Code
Trigger
Mode
Trigger
Enable
Rxdata ready
/Senc Mode
PositionBits/
Resolution
Bit
Type Default
Name
Description
[23:22]
R
0x000
Reserved
Reserved and always reads zero.
[21:16]
R
0x00
Command
Code
($38) 111000 – Encoder to Send Position (EnDat2.2 only)
($15) 010101 – Encoder to Receive Reset (EnDat2.2 only)
($07) 000111 – Encoder to Send Position (EnDat 2.1 & 2.2)
($2A)101010 – Encoder to Receive Reset (EnDat 2.1 & 2.2)
($15) 010101 – Encoder to Receive Reset (EnDat2.2 only)
($07) 000111 – Encoder to Send Position (EnDat 2.1 & 2.2)
($2A)101010 – Encoder to Receive Reset (EnDat 2.1 & 2.2)
[15:14]
R
00
Reserved
Reserved and always reads zero.
[13]
R/W
0
Trigger Mode
Trigger Mode: 0= continuous trigger
1= one-shot trigger
All triggers occur at the defined Phase/Servo clock edge and
delay setting. See Global Control register for these
settings.
1= one-shot trigger
All triggers occur at the defined Phase/Servo clock edge and
delay setting. See Global Control register for these
settings.
[12]
R/W
0
Trigger Enable
Enable trigger: 0= disabled
1= enabled
This bit must be set for either trigger mode. If the Trigger
Mode bit is set for one-shot mode, the hardware will
automatically clear this bit after the trigger occurs.
1= enabled
This bit must be set for either trigger mode. If the Trigger
Mode bit is set for one-shot mode, the hardware will
automatically clear this bit after the trigger occurs.
[11]
R/W
0
Reserved
Reserved and always reads zero.
[10]
R
0
RxData Ready
This read-only bit provides the received data status. It is low
while the interface logic is communicating (busy) with the
serial encoder. It is high when all the data has been received
and processed.
while the interface logic is communicating (busy) with the
serial encoder. It is high when all the data has been received
and processed.
W
0
SENC_MODE
This write-only bit is used to enable the output drivers for
the SENC_SDO, SENC_CLK, SENC_ENA pins for each
respective channel.
the SENC_SDO, SENC_CLK, SENC_ENA pins for each
respective channel.
[09:06]
R
0x0
Reserved
Reserved and always reads zero.
[05:00]
W
0x00
Position Bits
This bit field is used to define the number of position data
bits or encoder resolution:
Range is 12 – 40 (001100 –101000)
bits or encoder resolution:
Range is 12 – 40 (001100 –101000)