Delta Tau GEO BRICK LV User Manual
Geo Brick LV User Manual
PinOuts and Software Setup
96
Channel Control Registers
X:$78Bn0, X:$78Bn4, X:$78Bn8, X:$78BnC
where: n=2 for axes 1-4
n=3 for axes 5-8
Channel 1 X:$78B20 Channel 5 X:$78B30
Channel 2 X:$78B24 Channel 6 X:$78B34
Channel 3 X:$78B28 Channel 7 X:$78B38
Channel 4 X:$78B2C Channel 8 X:$78B3C
Channel 2 X:$78B24 Channel 6 X:$78B34
Channel 3 X:$78B28 Channel 7 X:$78B38
Channel 4 X:$78B2C Channel 8 X:$78B3C
Each channel has its own Serial Encoder Command Control Register defining functionality parameters.
Parameters such as setting the number of position bits in the serial bit stream, enabling/disabling channels
through the SENC_MODE (when this bit is cleared, the serial encoder pins of that channel are tri-stated),
enabling/disabling communication with the encoder using the trigger control bit.
[23:16]
15
14
13
12
11
10
9
[8:6]
[5:0]
CRC
Mask
=0 BiSS-C
=1 BiSS-B
=1 BiSS-B
MCD
Trigger
Mode
Trigger
Enable
Rxdataready
SencMode
Status
Bits
PositionBits/
Resolution
Bit
Type Default
Name
Description
[23:16] R/W
0x21
CRC_Mask
This bit field is used to define the CRC polynomial used for the
position and status data. The 8-bit mask is to define any 4-bit to 8-
bit CRC polynomial. The mask bits M[7:0] represent the
coefficients [8:1], respectively, in the polynomial: M
position and status data. The 8-bit mask is to define any 4-bit to 8-
bit CRC polynomial. The mask bits M[7:0] represent the
coefficients [8:1], respectively, in the polynomial: M
7
x
8
+M
6
x
7
+
M
5
x
6
+ M
4
x
5
+ M
3
x
4
+ M
2
x
3
+ M
1
x
2
+ M
0
x
1
+ 1. The coefficient for
x
0
is always 1 and therefore not included in the mask. An all zero
mask indicates no CRC bits in the encoder data. Most common
setting:
($21) 00100001 = x
setting:
($21) 00100001 = x
6
+ x
1
+ 1 (typical for Renishaw)
($09) 00001001 = x
4
+ x
1
+ 1
[15]
R/W
0
BiSS B/C
This bit is used to select the BiSS protocol mode
(=0 BiSS-C, =1 BiSS-B)
(=0 BiSS-C, =1 BiSS-B)
[14]
R/W
0
MCD
This bit is used to enable support for the optional MCD bit
in BiSS-B mode. Setting this bit has no effect if the BiSS-B
mode is not selected.
in BiSS-B mode. Setting this bit has no effect if the BiSS-B
mode is not selected.
[13]
R/W
0
Trigger Mode
Trigger Mode to initiate communication:
0= continuous trigger
1= one-shot trigger
All triggers occur at the defined Phase/Servo clock edge and
delay setting.
0= continuous trigger
1= one-shot trigger
All triggers occur at the defined Phase/Servo clock edge and
delay setting.
[12]
R/W
0
Trigger
Enable
0= disabled
1= enabled
This bit must be set for either trigger mode. If the Trigger
Mode bit is set for one-shot mode, the hardware will
automatically clear this bit after the trigger occurs.
1= enabled
This bit must be set for either trigger mode. If the Trigger
Mode bit is set for one-shot mode, the hardware will
automatically clear this bit after the trigger occurs.
[11]
0
Reserved
Reserved and always reads zero.
[10]
R
0
RxData Ready
This read-only bit provides the received data status. It is low
while the interface logic is communicating (busy) with the
serial encoder. It is high when all the data has been received
and processed.
while the interface logic is communicating (busy) with the
serial encoder. It is high when all the data has been received
and processed.