Nxp Semiconductors LPC2917 User Manual

LPC2917_19_1

© NXP B.V. 2007. All rights reserved.

The ARM968E-S is a general purpose 32-bit RISC processor, which offers high 
performance and very low power consumption. The ARM architecture is based on 
Reduced Instruction Set Computer (RISC) principles, and the instruction set and related 
decode mechanism are much simpler than those of micro-programmed Complex 
Instruction Set Computers (CISC). This simplicity results in a high instruction throughput 
and impressive real-time interrupt response from a small and cost-effective controller 
core.

Amongst the most compelling features of the ARM968E-S are: 

Separate directly connected instruction and data Tightly Coupled Memory (TCM) 
interfaces

Write buffers for the AHB and TCM buses

Enhanced 16 x 32 multiplier capable of single-cycle MAC operations and 16-bit fixed- 
point DSP instructions to accelerate signal-processing algorithms and applications.

Pipeline techniques are employed so that all parts of the processing and memory systems 
can operate continuously. The ARM968E-S is based on the ARMv5TE five-stage pipeline 
architecture. Typically, in a three-stage pipeline architecture, while one instruction is being 
executed its successor is being decoded and a third instruction is being fetched from 
memory. In the five-stage pipeline additional stages are added for memory access and 
write-back cycles.

The ARM968E-S processor also employs a unique architectural strategy known as 
THUMB, which makes it ideally suited to high-volume applications with memory 
restrictions or to applications where code density is an issue.

The key idea behind THUMB is that of a super-reduced instruction set. Essentially, the 
ARM968E-S processor has two instruction sets:

Standard 32-bit ARMv5TE set

16-bit THUMB set

The THUMB set's 16-bit instruction length allows it to approach twice the density of 
standard ARM code while retaining most of the ARM's performance advantage over a 
traditional 16-bit controller using 16-bit registers. This is possible because THUMB code 
operates on the same 32-bit register set as ARM code.

THUMB code can provide up to 65 % of the code size of ARM, and 160 % of the 
performance of an equivalent ARM controller connected to a 16-bit memory system.

The ARM968E-S processor is described in detail in the ARM968E-S data sheet 

.

The LPC2917/19 includes a 512 kB or 768 kB flash memory system. This memory can be 
used for both code and data storage. Programming of the flash memory can be 
accomplished in several ways. It may be programmed in-system via a serial port; e.g. 
CAN.