User ManualTable of Contents1. Introduction11.1 About this document11.2 Intended audience12. General description12.1 Architectural overview12.2 ARM968E-S processor22.3 On-chip flash memory system22.4 On-chip static RAM33. Features33.1 General34. Ordering information44.1 Ordering options45. Block diagram56. Pinning information66.1 Pinning66.2 Pin description66.2.1 General description66.2.2 LQFP144 pin assignment67. Functional description107.1 Reset, debug, test and power description107.1.1 Reset and power-up behavior107.1.2 Reset strategy107.1.3 IEEE 1149.1 interface pins (JTAG boundary-scan test)117.1.4 Power supply pins description117.2 Clocking strategy117.2.1 Clock architecture117.2.2 Base clock and branch clock relationship138. Block description148.1 Flash memory controller148.1.1 Overview148.1.2 Description158.1.3 Flash memory controller pin description168.1.4 Flash memory controller clock description168.1.5 Flash layout168.1.6 Flash bridge wait-states178.2 External static memory controller188.2.1 Overview188.2.2 Description188.2.3 External static-memory controller pin description198.2.4 External static-memory controller clock description198.2.5 External memory timing diagrams198.3 General subsystem228.3.1 General subsystem clock description228.3.2 Chip and feature identification228.3.3 System Control Unit (SCU)228.3.4 Event router228.4 Peripheral subsystem238.4.1 Peripheral subsystem clock description238.4.2 Watchdog timer248.4.3 Timer248.4.4 UARTs268.4.5 Serial peripheral interface278.4.6 General-purpose I/O298.5 CAN gateway308.5.1 Overview308.5.2 Global acceptance filter308.5.3 CAN pin description308.6 LIN308.6.1 Overview308.6.2 LIN pin description318.7 Modulation and sampling control subsystem318.7.1 Overview318.7.2 Description318.7.3 MSCSS pin description348.7.4 MSCSS clock description348.7.5 Analog-to-digital converter358.7.6 PWM378.7.7 Timers in the MSCSS398.8 Power, clock and reset control subsystem408.8.1 Overview408.8.2 Description408.8.3 PCR subsystem clock description418.8.4 Clock Generation Unit (CGU)418.8.5 Reset Generation Unit (RGU)478.8.6 Power Management Unit (PMU)488.9 Vectored interrupt controller508.9.1 Overview508.9.2 Description508.9.3 VIC pin description518.9.4 VIC clock description519. Limiting values5110. Thermal characteristics5211. Static characteristics5312. Dynamic characteristics5513. Package outline5814. Soldering5914.1 Introduction5914.2 Through-hole mount packages5914.2.1 Soldering by dipping or by solder wave5914.2.2 Manual soldering5914.3 Surface mount packages5914.3.1 Reflow soldering5914.3.2 Wave soldering6014.3.3 Manual soldering6114.4 Package related soldering information6115. Abbreviations6316. References6417. Revision history6518. Legal information6618.1 Data sheet status6618.2 Definitions6618.3 Disclaimers6618.4 Trademarks6619. Contact information6620. Contents67Size: 1.38 MBPages: 68Language: EnglishOpen manual