Nxp Semiconductors PCA9665 User Manual

PCA9665_2

© NXP B.V. 2006. All rights reserved.

In the Master Receiver Byte mode, a number of data bytes are received from a slave
transmitter one byte at a time (see

). The transfer is initialized as in the Master

Transmitter Byte mode.

The Master Receiver Byte mode may now be entered by setting the STA bit. The I

2

C-bus

state machine will first test the I

2

C-bus and generate a START condition as soon as the

bus becomes free. When a START condition is transmitted, the Serial Interrupt flag (SI) is
set, the Interrupt line (INT) goes LOW and the status code in the status register (I2CSTA)
will be 08h. This status code must be used to vector to an interrupt service routine that
loads I2CDAT with the slave address and the data direction bit (SLA+R). A write to
I2CCON resets the SI bit, clears the Interrupt (INT goes HIGH) and allows the serial
transfer to continue.

When the slave address and the data direction bit have been transmitted, the serial
interrupt flag (SI) is set again, the Interrupt line (INT) goes LOW again and I2CSTA is
loaded with the following possible codes:

40h if an acknowledgment bit (ACK) has been received for the slave address with
direction bit

48h if a no acknowledgment bit (NACK) has been received for the slave address with
direction bit

38h if the PCA9665 lost the arbitration

B0h if the PCA9665 lost the arbitration and is addressed as a slave transmitter (slave
mode enabled with AA = 1)

68h if the PCA9665 lost the arbitration and is addressed as a slave receiver (slave
mode enabled with AA = 1)

D8h if the PCA9665 lost the arbitration and is addressed as a slave receiver during a
General Call sequence (slave mode enabled with AA = 1 and General Call address
enabled with GC = 1 in I2CADR register).

The appropriate action to be taken for each of these status codes is detailed in

ENSIO is not affected by the serial transfer and is not referred to in

After a repeated START condition (state 10h), the PCA9665 may switch to the Master
Transmitter mode by loading I2CDAT with SLA+W.

Remark: A master should not transmit its own slave address.