SMSC LAN9420i Manual De Usuario
Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
SMSC LAN9420/LAN9420i
17
Revision 1.22 (09-25-08)
DATASHEET
Note 2.1
This pin is used for factory testing and is latched on power up. This pin is pulled high
through an internal resistor and must not be pulled low externally. This pin must be
augmented with an external resistor when connected to a load. The value of the resistor
must be such that the pin reaches its valid level before de-assertion of PCInRST following
power up. The “IS” input buffer type is enabled only during power up. The “IS” input buffer
type is disabled at all other times.
through an internal resistor and must not be pulled low externally. This pin must be
augmented with an external resistor when connected to a load. The value of the resistor
must be such that the pin reaches its valid level before de-assertion of PCInRST following
power up. The “IS” input buffer type is enabled only during power up. The “IS” input buffer
type is disabled at all other times.
Table 2.2 EEPROM
NUM
PINS
PINS
NAME
SYMBOL
BUFFER
TYPE
DESCRIPTION
1
EEPROM Data
EEDIO
IS/O8
EEPROM Data: This bi-directional pin can be connected
to an optional serial EEPROM DIO.
to an optional serial EEPROM DIO.
GPO3
GPO3
O8
General Purpose Output 3: This pin can also function
as a general purpose output. The EECS pin is deasserted
so as to never unintentionally access the serial EEPROM.
as a general purpose output. The EECS pin is deasserted
so as to never unintentionally access the serial EEPROM.
TX_EN
TX_EN
O8
TX_EN Signal Monitor: This pin can also be configured
to monitor the TX_EN signal on the internal MII port. The
EECS pin is deasserted so as to never unintentionally
access the serial EEPROM.
to monitor the TX_EN signal on the internal MII port. The
EECS pin is deasserted so as to never unintentionally
access the serial EEPROM.
TX_CLK
TX_CLK
O8
TX_CLK Signal Monitor: This pin can also be configured
to monitor the TX_CLK signal on the internal MII port.
The EECS pin is deasserted so as to never
unintentionally access the serial EEPROM.
to monitor the TX_CLK signal on the internal MII port.
The EECS pin is deasserted so as to never
unintentionally access the serial EEPROM.
1
EEPROM Chip
Select
EECS
O8
Serial EEPROM Chip Select.
1
EEPROM
Clock
EECLK
IS/O8
(PU)
EEPROM Clock: Serial EEPROM Clock pin
GPO4
GPO4
O8
General Purpose Output 4: This pin can also function
as a general purpose output. The EECS pin is deasserted
so as to never unintentionally access the serial EEPROM.
as a general purpose output. The EECS pin is deasserted
so as to never unintentionally access the serial EEPROM.
RX_DV
RX_DV
O8
RX_DV Signal Monitor: This pin can also be configured
to monitor the RX_DV signal on the internal MII port. The
EECS pin is deasserted so as to never unintentionally
access the serial EEPROM.
to monitor the RX_DV signal on the internal MII port. The
EECS pin is deasserted so as to never unintentionally
access the serial EEPROM.
RX_CLK
RX_CLK
O8
RX_CLK Signal Monitor: This pin can also be
configured to monitor the RX_CLK signal on the internal
MII port. The EECS pin is deasserted so as to never
unintentionally access the serial EEPROM.
configured to monitor the RX_CLK signal on the internal
MII port. The EECS pin is deasserted so as to never
unintentionally access the serial EEPROM.