SMSC LAN9420i Manual De Usuario

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Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
Revision 1.22 (09-25-08)
94
SMSC LAN9420/LAN9420i
DATASHEET
4.2.6
General Purpose Timer Configuration Register (GPT_CFG)
This register configures the general purpose timer (GPT). The GPT can be configured to generate
interrupts at intervals defined in this register. Refer to 
 for more information on the General Purpose Timer.
Offset:
00D4h
Size:
32 bits
BITS
DESCRIPTION
TYPE
DEFAULT
31:30
RESERVED
RO
-
29
General Purpose Timer Enable (TIMER_EN)
When a one is written to this bit the GPT is put into the run state. When 
cleared, the GPT is halted. On the 1-to-0 transition of this bit the 
GPT_LOAD field will be preset to FFFFh.
R/W
0b
28:16
RESERVED
RO
-
15:0
General Purpose Timer Pre-Load (GPT_LOAD)
This value is pre-loaded into the GPT. See 
R/W
FFFFh