STMicroelectronics Discovery kit for STM32L151/152 line - with STM32L152RC MCU STM32L152C-DISCO STM32L152C-DISCO Hoja De Datos

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Stresses above the absolute maximum ratings listed in 

, 

, and 

 may cause 

permanent damage to the device. These are stress ratings only and functional operation of 
the device at these conditions is not implied. Exposure to maximum rating conditions for 
extended periods may affect device reliability.

           

           

V

DD

–V

SS

External main supply voltage 



(including V

DDA 

and V

DD

)

(1)

1. All main power (V

DD

, V

DDA

) and ground (V

SS

, V

SSA

) pins must always be connected to the external power 

supply, in the permitted range.

–0.3

4.0

V

V

IN

(2)

2.  V

IN 

maximum must always be respected. Refer to 

 for maximum allowed injected current values.

Input voltage on five-volt tolerant pin

V

SS 

 0.3

V

DD

+4.0

Input voltage on any other pin

V

SS

 

0.3

4.0

|

V

DDx

|

Variations between different V

DD 

power pins

-

50

mV

|V

SSX 

V

SS

| Variations between all different ground pins

-

50

V

REF+ 

–V

DDA

Allowed voltage difference for V

REF+ 

> V

DDA

-

0.4

V

V

ESD(HBM)

Electrostatic discharge voltage 



(human body model)

I

VDD(Σ)

Total current into sum of all V

DD_x

 power lines (source)

(1)

1. All main power (V

DD

, V

DDA

) and ground (V

SS

, V

SSA

) pins must always be connected to the external power 

supply, in the permitted range.

100

mA

I

VSS(Σ)

(2)

2. This current consumption must be correctly distributed over all I/Os and control pins. The total output 

current must not be sunk/sourced between two consecutive power supply pins referring to high pin count 

LQFP packages.

Total current out of sum of all V

SS_x

 ground lines (sink)

100

I

VDD(PIN)

 Maximum current into each V

DD_x

 power pin (source)

70

I

VSS(PIN)

Maximum current out of each VSS_x ground pin (sink)

-70

I

IO

Output current sunk by any I/O and control pin

25

Output current sourced by any I/O and control pin

- 25

ΣI

IO(PIN)

Total output current sunk by sum of all IOs and control 
pins

60

 Total output current sourced by sum of all IOs and control 
pins

-60

I

INJ(PIN)

 (3)

3. Negative injection disturbs the analog performance of the device. See note in 

.

Injected current on five-volt tolerant I/O

(4)

, RST and B pins

-5/+0

Injected current on any other pin 

(5)

± 5 

ΣI

INJ(PIN)

Total injected current (sum of all I/O and control pins)

(6)

± 25