Intel 815 Manuel D’Utilisation
Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0
R
323
16.2.2. IER—Interrupt Enable Register
Address Offset:
020A0h
Default Value:
0000h
Access: Read/Write
Size: 16
Size: 16
bits
Individual enables for each interrupt described above. A disabled interrupt will still appear in the
Interrupt Identity Register to allow polling of interrupt sources.
Interrupt Identity Register to allow polling of interrupt sources.
15 14
13 12
11
10
9
8
HW
Detect
Error
Master
Reserved Sync
Status
Toggle
Pri Dply
Flip
Pending
Sec Dply
Flip
Pending
(Rsvd in
(Rsvd in
GMCH)
Overlay 0
Flip
Pending
Overlay 1
Flip
Pending
(Rsvd in
(Rsvd in
GMCH)
7 6 5 4 3 2 1 0
Pri Dply
VBLANK.
Pri Dply
Event
Reserved Reserved Reserved Reserved User
Defined
Interrupt
Breakpoint
Bit Description
15:0
Interrupt Enables. (See Table 17.)
1 = Enable.
0 = Disable.