Intel 815 Manuel D’Utilisation
Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0
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9.2.6. SR04
Memory Mode Register
I/O (and Memory Offset) Address: 3C5h (index=04h)
Default: 00h
Attributes: Read/Write
Default: 00h
Attributes: Read/Write
7
4
3 2 1 0
Reserved (0000)
Chain 4
Odd/Even
Extended
Memory
Reserved
(0)
Bit Description
7:4
Reserved. Read as 0s.
3
Chain 4 Mode. The selections made by this bit affect both processor Read and Write accesses to the
frame buffer.
frame buffer.
0 = The manner in which the frame buffer memory is mapped is determined by the setting of bit 2 of this
register (default).
1 = The frame buffer memory is mapped in such a way that the function of address bits 0 and 1 are
altered so that they select planes 0 through 3.
2
Odd/Even Mode. Bit 3 of this register must be set to 0 for this bit to be effective. The selections made
by this bit affect only processor writes to the frame buffer.
by this bit affect only processor writes to the frame buffer.
0 = The frame buffer memory is mapped in such a way that the function of address bit 0 such that even
addresses select planes 0 and 2 and odd addresses select planes 1 and 3 (default).
1 = Addresses sequentially access data within a bit map, and the choice of which map is accessed is
made according to the value of the Plane Mask Register (SR02).
1
Extended Memory Enable. This bit must be set to 1 to enable the selection and use of character maps
in plane 2 via the Character Map Select Register (SR03).
in plane 2 via the Character Map Select Register (SR03).
0 = Disable processor accesses to more than the first 64KB of VGA standard memory (default).
1 = Enable processor accesses to the rest of the 256KB total VGA memory beyond the first 64KB.
0
Reserved. Read as 0s.