Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Fiche De Données
Codes de produits
AT91SAM9N12-EK
171
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
21.4.4 Slow Clock Configuration Register
Name:
SCKCR
Address:
0xFFFFFE50
Access:
Read-write
Reset:
0x0000_0001
• RCEN: Internal 32 kHz RC
0: 32 kHz RC is disabled
1: 32 kHz RC is enabled
• OSC32EN: 32768 Hz oscillator
0: 32768 Hz oscillator is disabled
1: 32768 Hz oscillator is enabled
• OSC32BYP: 32768 Hz oscillator bypass
0: 32768 Hz oscillator is not bypassed
1: 32768 Hz oscillator is bypassed, accept an external slow clock on XIN32
• OSCSEL: Slow clock selector
0: Slow clock is internal 32 kHz RC
1: Slow clock is 32768 Hz oscillator
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
–
–
–
–
OSCSEL
OSC32BYP
OSC32EN
RCEN