Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Fiche De Données

Codes de produits
AT91SAM9N12-EK
Page de 1104
706
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
39.2
Embedded Characteristics
Two TWIs 
Compatible with Atmel Two-wire Interface Serial Memory and I²C Compatible Devices
One, Two or Three Bytes for Slave Address
Sequential Read-write Operations
Master, Multi-master and Slave Mode Operation
Bit Rate: Up to 400 Kbit/s
General Call Supported in Slave mode
SMBUS Quick Command Supported in Master Mode
Connection to DMA Controller (DMA) Channel Capabilities Optimizes Data Transfers
Note:
1.
 for details on compatibility with I²C Standard.
39.3
List of Abbreviations
Table 39-2. Abbreviations
Abbreviation
Description
TWI
Two-wire Interface
A
Acknowledge
NA
Non Acknowledge
P
Stop
S
Start
Sr
Repeated Start
SADR
Slave Address
ADR
Any address except SADR
R
Read
W
Write