Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Fiche De Données

Codes de produits
ATSAM4S-WPIR-RD
Page de 1231
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
670
33.7.3.2 Master Mode Flow Diagram 
Figure 33-6.
Master Mode Flow Diagram
SPI Enable
CSAAT ?
PS ?
1
0
0
1
1
NPCS = SPI_TDR(PCS)
NPCS = SPI_MR(PCS)
Delay DLYBS
Serializer = SPI_TDR(TD)
TDRE = 1
Data Transfer
SPI_RDR(RD) = Serializer
RDRF = 1
TDRE ?
NPCS deasserted
Delay DLYBCS
Fixed
 peripheral
Variable 
peripheral
Delay DLYBCT
0
1
CSAAT ?
0
TDRE ?
1
0
PS ?
0
1
SPI_TDR(PCS)
= NPCS ?
no
yes
SPI_MR(PCS)
= NPCS ?
no
NPCS deasserted
Delay DLYBCS
NPCS = SPI_TDR(PCS)
NPCS deasserted
Delay DLYBCS
NPCS = SPI_MR(PCS),
                SPI_TDR(PCS) 
Fixed
 peripheral
Variable 
peripheral
- NPCS defines the current Chip Select
- CSAAT, DLYBS, DLYBCT refer to the fields of the 
  Chip Select Register corresponding to the Current Chip Select