Intel E3815 FH8065301567411 Fiche De Données

Codes de produits

FH8065301567411

Intel

Atom™ Processor E3800 Product Family

Datasheet

Table 139

PCU - SPI NOR AC Specifications............................................................. 192

Table 140

SMBUS Clock Signal Timings .................................................................. 193

Table 141

SMBus Timing ...................................................................................... 194

Table 142

LPC AC Specifications (with loop back from ILB_LPC_CLK[0] to ILB_LPC_CLK[1])

195

Table 143

C Fast/Standard Mode AC Specifications................................................ 196

Table 144

AC Specification for High Speed Mode I

C—Bus Devices ............................. 199

Table 145

UART AC Specification ........................................................................... 201

Table 146

JTAG AC Specification............................................................................ 201

Table 147

Boundary Scan AC Specification.............................................................. 202

Table 148

Ball Listing by Location with GPIO Muxed Functions ................................... 210

Table 149

Memory Channel 0 DDR3L Signals........................................................... 275

Table 150

Memory Channel 1 DDR3L Signals........................................................... 276

Table 151

ECC Signals and Memory Channel 1 Signal Muxing .................................... 278

Table 152

ECC Signals ......................................................................................... 278

Table 153

Supported DDR3L Memory Size Per Rank ................................................. 279

Table 154

Supported DDR3L ECC Memory Size Per Rank .......................................... 279

Table 155

Supported DDR3L SO-DIMM Size ............................................................ 280

Table 156

Summary of Memory Controller Message Bus Registers—Port 0x01 ............. 281

Table 157

Summary of A-Unit Message Bus Registers—Port 0x00 .............................. 318

Table 158

Summary of PCI Configuration Space Access I/O Registers......................... 321

Table 159

Summary of B-Unit Message Bus Registers—Port 0x03 .............................. 323

Table 160

Summary of C-Unit PCI Configuration Registers—0/0/0.............................. 338

Table 161

Summary of C-Unit Message Bus Registers—Port 0x08 .............................. 345

Table 162

Summary of Transaction Router P-Unit Message Bus Registers—Port 0x04 ... 351

Table 163

Analog Display Interface Signals ............................................................. 407

Table 164

Analog Port Characteristics..................................................................... 408

Table 165

Display Physical Interfaces Signal Names ................................................. 409

Table 166

Graphics clock frequency by SKUs........................................................... 414

Table 167

Bay Trail-M/D Stepping POR for Video Encode/Decode ............................... 416

Table 168

Hardware Accelerated Video Decode Codec Support .................................. 417

Table 169

Summary of Graphics, Video and Display PCI Configuration Registers—0/2/0 419

Table 170

Summary of Display Memory Mapped I/O Registers—GTTMMADR_LSB ......... 445

Table 171

Summary of Display Memory Mapped I/O Registers—GTTMMADR_LSB ......... 635

Table 172

Summary of Display Memory Mapped I/O Registers—GTTMMADR_LSB ....... 1027

Table 173

Summary of Display Memory Mapped I/O Registers—GTTMMADR_LSB ....... 1033

Table 174

CSI Signals ........................................................................................ 1038

Table 175

GPIO Signals...................................................................................... 1038

Table 176

Imaging Capabilities............................................................................ 1040

Table 177

Summary of Image Signal Processor PCI Configuration Registers—0/2/0.... 1050

Table 178

Summary of Image Signal Processor Memory Mapped I/O Registers—ISPMMADR

1076

Table 179

eMMC Signals..................................................................................... 1745

Table 180

SDIO Signals...................................................................................... 1745

Table 181

SD Card Signals ................................................................................. 1746

Table 182

Summary of SDIO for Wifi PCI Configuration Registers—0/17/0 ................ 1751

Table 183

Summary of SDIO for Wifi Memory Mapped I/O Registers—BAR ................ 1763

Table 184

Summary of SD Card PCI Configuration Registers—0/18/0 ....................... 1807

Table 185

Summary of SD Card Memory Mapped I/O Registers—BAR ....................... 1819

Table 186

Summary of eMMC 4.5 PCI Configuration Registers—0/23/0 ..................... 1863

Table 187

Summary of eMMC 4.5 Memory Mapped I/O Registers—BAR..................... 1875

Table 188

Signals .............................................................................................. 1920

Table 189

SATA Feature List ............................................................................... 1920