Intel IA-32 Manuale Utente

7-46 Vol. 3A

The PAUSE instruction improves the performance of IA-32 processors supporting Hyper-
Threading Technology when executing “spin-wait loops” and other routines where one thread
is accessing a shared lock or semaphore in a tight polling loop. When executing a spin-wait loop,
the processor can suffer a severe performance penalty when exiting the loop because it detects
a possible memory order violation and flushes the core processor’s pipeline. The PAUSE
instruction provides a hint to the processor that the code sequence is a spin-wait loop. The
processor uses this hint to avoid the memory order violation and prevent the pipeline flush. In
addition, the PAUSE instruction de-pipelines the spin-wait loop to prevent it from consuming
execution resources excessively. (See Section 7.11.6.1, “Use the PAUSE Instruction in Spin-
Wait Loops,” for more information about using the PAUSE instruction with IA-32 processors
supporting Hyper-Threading Technology.)

Streaming SIMD Extensions 3 introduced two instructions (MONITOR and MWAIT) to help
multithreaded software improve thread synchronization. In the initial implementation,
MONITOR and MWAIT are available to software at ring 0. The instructions are conditionally
available at levels greater than 0. Use the following steps to detect the availability of MONITOR
and MWAIT:

•

Use CPUID to query the MONITOR bit (CPUID.1.ECX[3] = 1).

•

If CPUID indicates support, execute MONITOR inside a TRY/EXCEPT exception handler
and trap for an exception. If an exception occurs, MONITOR and MWAIT are not
supported at a privilege level greater than 0. See Example 7-4.

boolean MONITOR_MWAIT_works = TRUE;
try {

_asm {

xor ecx, ecx
xor edx, edx
mov eax, MemArea
monitor 
}

        // Use monitor
} except (UNWIND) {
        // if we get here, MONITOR/MWAIT is not supported

MONITOR_MWAIT_works = FALSE;

}