Intel IA-32 Manuale Utente
15-26 Vol. 3A
8086 EMULATION
15.3.3.2
Methods 2 and 3: Software Interrupt Handling
When a software interrupt occurs in virtual-8086 mode and the method 2 or 3 conditions are
present, the processor generates a general-protection exception (#GP). Method 2 is enabled
when the VME flag is set to 0 and the IOPL value is less than 3. Here the IOPL value is used to
bypass the protected-mode interrupt handlers and cause any software interrupt that occurs in
virtual-8086 mode to be treated as a protected-mode general-protection exception (#GP). The
general-protection exception handler calls the virtual-8086 monitor, which can then emulate an
8086-program interrupt handler or pass control back to the 8086 program’s handler, as described
in Section 15.3.1.2, “Handling an Interrupt or Exception With an 8086 Program Interrupt or
Exception Handler”.
present, the processor generates a general-protection exception (#GP). Method 2 is enabled
when the VME flag is set to 0 and the IOPL value is less than 3. Here the IOPL value is used to
bypass the protected-mode interrupt handlers and cause any software interrupt that occurs in
virtual-8086 mode to be treated as a protected-mode general-protection exception (#GP). The
general-protection exception handler calls the virtual-8086 monitor, which can then emulate an
8086-program interrupt handler or pass control back to the 8086 program’s handler, as described
in Section 15.3.1.2, “Handling an Interrupt or Exception With an 8086 Program Interrupt or
Exception Handler”.
Method 3 is enabled when the VME flag is set to 1, the IOPL value is less than 3, and the corre-
sponding bit for the software interrupt in the software interrupt redirection bit map is set to 1.
Here, the processor performs the same operation as it does for method 2 software interrupt
handling. If the corresponding bit for the software interrupt in the software interrupt redirection
bit map is set to 0, the interrupt is handled using method 6 (see Section 15.3.3.5, “Method 6:
Software Interrupt Handling”).
sponding bit for the software interrupt in the software interrupt redirection bit map is set to 1.
Here, the processor performs the same operation as it does for method 2 software interrupt
handling. If the corresponding bit for the software interrupt in the software interrupt redirection
bit map is set to 0, the interrupt is handled using method 6 (see Section 15.3.3.5, “Method 6:
Software Interrupt Handling”).
15.3.3.3
Method 4: Software Interrupt Handling
Method 4 handling is enabled when the VME flag is set to 1, the IOPL value is 3, and the bit for
the interrupt vector in the redirection bit map is set to 1. Method 4 software interrupt handling
allows method 1 style handling when the virtual mode extension is enabled; that is, the interrupt
is directed to a protected-mode handler (see Section 15.3.3.1, “Method 1: Software Interrupt
Handling”).
the interrupt vector in the redirection bit map is set to 1. Method 4 software interrupt handling
allows method 1 style handling when the virtual mode extension is enabled; that is, the interrupt
is directed to a protected-mode handler (see Section 15.3.3.1, “Method 1: Software Interrupt
Handling”).
15.3.3.4
Method 5: Software Interrupt Handling
Method 5 software interrupt handling provides a streamlined method of redirecting software
interrupts (invoked with the INT n instruction) that occur in virtual 8086 mode back to the 8086
program’s interrupt vector table and its interrupt handlers. Method 5 handling is enabled when
the VME flag is set to 1, the IOPL value is 3, and the bit for the interrupt vector in the redirection
bit map is set to 0. The processor performs the following actions to make an implicit call to the
selected 8086 program interrupt handler:
interrupts (invoked with the INT n instruction) that occur in virtual 8086 mode back to the 8086
program’s interrupt vector table and its interrupt handlers. Method 5 handling is enabled when
the VME flag is set to 1, the IOPL value is 3, and the bit for the interrupt vector in the redirection
bit map is set to 0. The processor performs the following actions to make an implicit call to the
selected 8086 program interrupt handler:
1.
Pushes the low-order 16 bits of the EFLAGS register onto the stack.
2.
Pushes the current values of the CS and EIP registers onto the current stack. (Only the 16
least-significant bits of the EIP register are pushed and no stack switch occurs.)
least-significant bits of the EIP register are pushed and no stack switch occurs.)
3.
Clears the IF flag in the EFLAGS register to disable interrupts.
4.
Clears the TF flag, in the EFLAGS register.
5.
Locates the 8086 program interrupt vector table at linear address 0 for the 8086-mode task.