Intel IA-32 Manuale Utente

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2-10 Vol. 3A
SYSTEM ARCHITECTURE OVERVIEW
2.1.7
Other System Resources
Besides the system registers and data structures described in the previous sections, system archi-
tecture provides the following additional resources:
Operating system instructions (see also: Section 2.6, “System Instruction Summary”).
Performance-monitoring counters (not shown in Figure 2-1).
Internal caches and buffers (not shown in Figure 2-1).
Performance-monitoring counters are event counters that can be programmed to count processor
events such as the number of instructions decoded, the number of interrupts received, or the
number of cache loads. See also: Section 18, “Debugging and Performance Monitoring.”
The processor provides several internal caches and buffers. The caches are used to store both
data and instructions. The buffers are used to store things like decoded addresses to system and
application segments and write operations waiting to be performed. See also: Chapter 10,
“Memory Cache Control.”
2.2
MODES OF OPERATION
The IA-32 architecture supports four operating modes and one quasi-operating mode:
Protected mode — This is the native operating mode of the processor. It provides a rich
set of architectural features, flexibility, high performance and backward compatibility to
existing software base.
Real-address mode — This operating mode provides the programming environment of
the Intel 8086 processor, with a few extensions (such as the ability to switch to protected or
system management mode).
System management mode (SMM) — SMM is a standard architectural feature in all
IA-32 processors, beginning with the Intel386 SL processor. This mode provides an
operating system or executive with a transparent mechanism for implementing power
management and OEM differentiation features. SMM is entered through activation of an
external system interrupt pin (SMI#), which generates a system management interrupt
(SMI). In SMM, the processor switches to a separate address space while saving the
context of the currently running program or task. SMM-specific code may then be
executed transparently. Upon returning from SMM, the processor is placed back into its
state prior to the SMI.
Virtual-8086 mode — In protected mode, the processor supports a quasi-operating mode
known as virtual-8086 mode. This mode allows the processor execute 8086 software in a
protected, multitasking environment.
IA-32e mode — In IA-32e mode, the processor supports two sub-modes: compatibility
mode and 64-bit mode. 64-bit mode provides 64-bit linear addressing and support for
physical address space larger than 64 GBytes. Compatibility mode allows most legacy
protected-mode applications to run unchanged.
Figure 2-3 shows how the processor moves among these operating modes.