ARM R4 Manuale Utente

ARM DDI 0363E

4-58

ID013010

Table 4-39 shows how the bit values correspond with the BTCM Region Register.

To access the BTCM Region Register, read or write CP15 with:

MRC p15, 0, <Rd>, c9, c1, 0

; Read BTCM Region Register

MCR p15, 0, <Rd>, c9, c1, 0

; Write BTCM Region Register

The ATCM Region Register holds the base address and size of the ATCM. It also determines if 
the ATCM is enabled. 

The ATCM Region Register is:
•

a read/write register

•

accessible in Privileged mode only.

Figure 4-42 on page 4-59 shows the arrangement of bits in the register.

Base address

31

12 11

7 6

2 1 0

Reserved

Size

Reserved

Enable

[31:12] Base 

address

Base address. Defines the base address of the BTCM. The base address must be aligned to the 
size of the BTCM. Any bits in the range [(log

2

(RAMSize)-1):12] are ignored. 

At reset, if LOCZRAMA is set to:
0 =The initial base address is 

0x0

.

1 =The initial base address is implementation-defined. See Configurable options on page 1-13.

[11:7]

Reserved

UNP on reads, SBZ on writes.

[6:2]

Size

Size. Indicates the size of the BTCM on reads. On writes this field is ignored. See About the 
TCMs on page 8-13.

b00000 = 0KB
b00011 = 4KB
b00100 = 8KB
b00101 = 16KB

b00110 = 32KB
b00111 = 64KB
b01000 = 128KB
b01001 = 256KB

b01010 = 512kB
b01011 = 1MB
b01100 = 2MB
b01101 = 4MB
b01110 = 8MB

[1]

Reserved

SBZ. 

[0]

Enable

Enables or disables the BTCM.
0 = Disabled
1 = Enabled. The reset value of this field is determined by the INITRAMB input pin.