Motorola CPCI-6020 ユーザーズマニュアル
Asynchronous Serial Ports
Functional Description
CPCI-6020 CompactPCI Single Board Computer Installation and Use (6806800A51C)
101
4.17
Asynchronous Serial Ports
The CPCI-6020 provides two 16550 compatible asynchronous serial interfaces, COM1 and
COM2. The COM1 port signals are wired to the front panel RJ-45 connector and it may
optionally be wired to the backplane via J5 instead. The COM2 port is wired to the J5 connector
only.
COM2. The COM1 port signals are wired to the front panel RJ-45 connector and it may
optionally be wired to the backplane via J5 instead. The COM2 port is wired to the J5 connector
only.
COM1 is routed to an RJ-45 connector located at the rear panel of the CPCI-6020-MCPTM-01.
COM2 can be accessed by a planar 9-pin header on transition module. The COM2 signals are
also wired to PMC I/O connector for possible access through PMC I/O module.
COM2 can be accessed by a planar 9-pin header on transition module. The COM2 signals are
also wired to PMC I/O connector for possible access through PMC I/O module.
4.18
Synchronous Serial Ports
The two synchronous ports, C0M3 and COM4, are implemented with the Z85230 ESCC on
CPCI-6020. Since the Z85230 does not have all modem control lines, a Z8536 CIO is used to
provide the missing modem lines. All modem control lines from the ESCC are multiplexed/de-
multiplexed through J3 by the P2MX function due to I/O pin limitations.
CPCI-6020. Since the Z85230 does not have all modem control lines, a Z8536 CIO is used to
provide the missing modem lines. All modem control lines from the ESCC are multiplexed/de-
multiplexed through J3 by the P2MX function due to I/O pin limitations.
This hardware function is transparent to software. The block diagram for the signal multiplexing
on the CPCI-6020-MCPTM-01 is shown in the following figure:
on the CPCI-6020-MCPTM-01 is shown in the following figure:
4.19
I/O Signal Multiplexing (IOMUX)
The IOMUX function is implemented on the CPCI-6020-MCPTM-01 using a PLD. A similar
device exists on the CPCI-6020. There are four pins that are used for the IOMX function:
MXCLK, MXSYNC#, MXDO and MXDI. MXCLK is the 10 MHz bit clock for the time-multiplexed
data lines MXDO and MXDI. MXSYNC# is asserted for one bit time at Time Slot 15 by the CPCI-
device exists on the CPCI-6020. There are four pins that are used for the IOMX function:
MXCLK, MXSYNC#, MXDO and MXDI. MXCLK is the 10 MHz bit clock for the time-multiplexed
data lines MXDO and MXDI. MXSYNC# is asserted for one bit time at Time Slot 15 by the CPCI-
Figure 4-3
Serial Port Signal Multiplexing
MX
Function
J3
Connector
MXSYNC#
MXDO
MXCLK
MXDI
Serial
3
Serial
4