Motorola CPCI-6020 ユーザーズマニュアル

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Serial Interface Modules (SIM)
Functional Description
CPCI-6020 CompactPCI Single Board Computer Installation and Use (6806800A51C)
103
 
MXSYNC# is clocked out using the falling edge of MXCLK and MDXO is clocked out with the 
rising edge of the MXCLK. MXDI is sampled at the rising edge of MXCLK (the CPCI-6020 MTB 
synchronizes MXDI with MXCLK’s rising edge). The timing relationships among MXCLK, 
MXSYNC#, MXDO and MXDI are illustrated by the following figure:
4.20
Serial Interface Modules (SIM)
The synchronous serial ports on the CPCI-6020-MCPTM-01 are configured via serial interface 
modules (SIMs), used in conjunction with the appropriate jumper settings on the transition 
module. The SIMs are small, plug-in printed circuit boards which contain all the circuitry needed 
to convert a TTL-level port to the standard voltage levels needed by various industry-standard 
serial interfaces, such as EIA-232, EIA-530, etc.
4.21
PMC Interface Module (PIM)
The CPCI-6020-MCPTM-01 provides additional I/O capabilities for the CPCI-6020. There are 
two distinct groups of I/O passed from the CPCI-6020 to the CPCI-6020-MCPTM-01 through 
the CompactPCI J3 and J5 connectors, CPCI-6020 host I/O and PMC I/O. The host I/O 
functions are designed into the CPCI-6020 and their presence or absence is determined when 
that board is built. This I/O cannot be configured at the system integration level. PMC I/O 
Figure 4-4
P2MX Signal Timings
Time Slot 15
Time Slot 0
Time Slot 1
Time Slot 2
Time Slot 3
MMXCLK
MMXSYNC#
MMXDO
MMXDI
Reserved
DCD2
RTS3
CTS3
DTR3
DSR3
RTS1
DCD3
RTS2
CTS1