Nxp Semiconductors PCA9665 マニュアル

目次

• 1. General description

  1
• 2. Features

  1
• 3. Applications

  2
• 4. Ordering information

  2
• 5. Block diagram

  3
• 6. Pinning information

  4
  • 6.1 Pinning

    4
  • 6.2 Pin description

    5
• 7. Functional description

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  • 7.1 General

    6
  • 7.2 Internal oscillator

    6
  • 7.3 Registers

    6
    • 7.3.1 Direct registers

      8
      • 7.3.1.1 The Status register, I2CSTA (A1=0, A0=0)

        8
      • 7.3.1.2 The Indirect Pointer register, INDPTR (A1=0, A0=0)

        8
      • 7.3.1.3 The I2C-bus Data register, I2CDAT (A1=0, A0=1)

        8
      • 7.3.1.4 The Control register, I2CCON (A1=1, A0=1)

        9
      • 7.3.1.5 The indirect data field access register, INDIRECT (A1 = 1, A0=0)

        11
    • 7.3.2 Indirect registers

      12
      • 7.3.2.1 The Byte Count register, I2CCOUNT (indirect address 00h)

        12
      • 7.3.2.2 The Own Address register, I2CADR (indirect address 01h)

        12
      • 7.3.2.3 The Clock Rate registers, I2CSCLL and I2CSCLH (indirect addresses 02h and 03h)

        13
      • 7.3.2.4 The Time-out register, I2CTO (indirect address 04h)

        14
      • 7.3.2.5 The Parallel Software Reset register, I2CPRESET (indirect address 05h)

        14
      • 7.3.2.6 The I2C-bus mode register, I2CMODE (indirect address 06h)

        15
• 8. PCA9665 modes

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  • 8.1 Configuration modes

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    • 8.1.1 Byte mode

      16
    • 8.1.2 Buffered mode

      16
  • 8.2 Operating modes

    16
  • 8.3 Byte mode

    17
    • 8.3.1 Master Transmitter Byte mode

      17
    • 8.3.2 Master Receiver Byte mode

      22
    • 8.3.3 Slave Receiver Byte mode

      25
    • 8.3.4 Slave Transmitter Byte mode

      29
  • 8.4 Buffered mode

    31
    • 8.4.1 Master Transmitter Buffered mode

      31
    • 8.4.2 Master Receiver Buffered mode

      36
    • 8.4.3 Slave Receiver Buffered mode

      40
    • 8.4.4 Slave Transmitter Buffered mode

      45
  • 8.5 Buffered mode examples

    48
    • 8.5.1 Buffered Master Transmitter mode of operation

      48
    • 8.5.2 Buffered Master Receiver mode of operation

      48
    • 8.5.3 Buffered Slave Transmitter mode

      49
    • 8.5.4 Buffered Slave Receiver mode

      50
    • 8.5.5 Example: Read 128 bytes in two 64-byte sequences of an EEPROM (I2C-busaddress=A0h for wr...

      50
  • 8.6 I2CCOUNT register

    51
  • 8.7 Acknowledge management (I2C-bus addresses and data) in Byte and Buffered modes

    53
  • 8.8 Miscellaneous states

    57
    • 8.8.1 I2CSTA=F8h

      57
    • 8.8.2 I2CSTA=00h

      57
    • 8.8.3 I2CSTA=70h

      57
    • 8.8.4 I2CSTA=78h

      58
  • 8.9 Some special cases

    58
    • 8.9.1 Simultaneous repeated START conditions from two masters

      58
    • 8.9.2 Data transfer after loss of arbitration

      58
    • 8.9.3 Forced access to the I2C-bus

      58
    • 8.9.4 I2C-bus obstructed by a LOW level on SCL or SDA

      59
    • 8.9.5 Bus error

      60
  • 8.10 Power-on reset

    60
  • 8.11 Reset

    61
  • 8.12 I2C-bus timing diagrams, Unbuffered mode

    61
  • 8.13 I2C-bus timing diagrams, Buffered mode

    63
• 9. Characteristics of the I2C-bus

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  • 9.1 Bit transfer

    65
    • 9.1.1 START and STOP conditions

      65
  • 9.2 System configuration

    65
  • 9.3 Acknowledge

    66
• 10. Application design-in information

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  • 10.1 Specific applications

    67
  • 10.2 Add I2C-bus port

    67
  • 10.3 Add additional I2C-bus ports

    68
  • 10.4 Convert 8bits of parallel data into I2C-bus serial data stream

    68
• 11. Limiting values

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• 12. Static characteristics

  70
• 13. Dynamic characteristics

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• 14. Test information

  78
• 15. Package outline

  79
• 16. Handling information

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• 17. Soldering

  83
  • 17.1 Introduction

    83
  • 17.2 Through-hole mount packages

    83
    • 17.2.1 Soldering by dipping or by solder wave

      83
    • 17.2.2 Manual soldering

      83
  • 17.3 Surface mount packages

    83
    • 17.3.1 Reflow soldering

      83
    • 17.3.2 Wave soldering

      85
    • 17.3.3 Manual soldering

      85
  • 17.4 Package related soldering information

    85
• 18. Abbreviations

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• 19. Revision history

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• 20. Legal information

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  • 20.1 Data sheet status

    89
  • 20.2 Definitions

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  • 20.3 Disclaimers

    89
  • 20.4 Trademarks

    89
• 21. Contact information

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• 22. Contents

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