Intel E3815 FH8065301567411 데이터 시트
제품 코드
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
4559
37.6.5
C0AP—Offset 50h
Counter 0 Counter Access Port Register
Access Method
Default: 00h
37.6.6
C1AP—Offset 51h
Counter 1 Counter Access Port Register
Access Method
Default: 00h
37.6.7
C2AP—Offset 52h
Counter 2 Counter Access Port Register
Access Method
Default: 00h
Type:
I/O Register
(Size: 8 bits)
C0AP:
7
4
0
0
0
0
0
0
0
0
0
CP
Bit
Range
Default &
Access
Description
7:0
X
RW
CP:
Counter Port: Each counter port address is used to program the 16-bit Count
Register. The order of programming, either LSB only, MSB only, or LSB then MSB, is
defined with the Interval Counter Control Register at port 43h. The counter port is also
used to read the current count from the Count Register, and return the status of the
counter programming following a Read Back Command.
Type:
I/O Register
(Size: 8 bits)
C1AP:
7
4
0
0
0
0
0
0
0
0
0
CP
Bit
Range
Default &
Access
Description
7:0
X
RW
CP:
Counter Port: Each counter port address is used to program the 16-bit Count
Register. The order of programming, either LSB only, MSB only, or LSB then MSB, is
defined with the Interval Counter Control Register at port 43h. The counter port is also
used to read the current count from the Count Register, and return the status of the
counter programming following a Read Back Command.
Type:
I/O Register
(Size: 8 bits)
C2AP:
7
4
0
0
0
0
0
0
0
0
0
CP