Freescale Semiconductor MC68HC908MR32 Manual Do Utilizador

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Freescale Semiconductor

These read/write registers contain the captured TIMB counter value of the input capture function or the 
output compare value of the output compare function. The state of the TIMB channel registers after reset 
is unknown.

In input capture mode (MSxB–MSxA = 0:0), reading the high byte of the TIMB channel x registers 
(TBCHxH) inhibits input captures until the low byte (TBCHxL) is read.

In output compare mode (MSxB–MSxA 

≠ 0:0), writing to the high byte of the TIMB channel x registers 

(TBCHxH) inhibits output compares until the low byte (TBCHxL) is written.

Register Name and Address:

TBCH0H — $0057

Bit  7

6

5

4

3

2

1

Bit  0

Read:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Write:

Reset:

Indeterminate after reset

Register Name and Address:

TBCH0L — $0058

Bit  7

6

5

4

3

2

1

Bit  0

Read:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Write:

Reset:

Indeterminate after reset

Register Name and Address:

TBCH1H — $005A

Bit  7

6

5

4

3

2

1

Bit  0

Read:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Write:

Reset:

Indeterminate after reset

Register Name and Address:

TBCH1L — $005B

Bit  7

6

5

4

3

2

1

Bit  0

Read:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Write:

Reset:

Indeterminate after reset