Freescale Semiconductor MC68HC908MR32 Manual Do Utilizador

74

Freescale Semiconductor

EDGE — Edge-Align Enable Bit

EDGE determines if the motor control PWM will operate in edge-aligned mode or center-aligned mode. 
See 

1 = Edge-aligned mode enabled
0 = Center-aligned mode enabled

BOTNEG determines if the bottom-side PWMs will have positive or negative polarity. See 

1 = Negative polarity
0 = Positive polarity

TOPNEG determines if the top-side PWMs will have positive or negative polarity. See 

1 = Negative polarity 
0 = Positive polarity

INDEP determines if the motor control PWMs will be six independent PWMs or three complementary 
PWM pairs. See 

1 = Six independent PWMs
0 = Three complementary PWM pairs

LVIRST enables the reset signal from the LVI module. See

.

1 = LVI module resets enabled
0 = LVI module resets disabled

LVIPWR enables the LVI module. 

1 = LVI module power enabled
0 = LVI module power disabled

Writing a 0 or a 1 to bit 1 has no effect on MCU operation. Bit 1 operates the same as the other bits 
within this write-once register operate.

1 = STOP mode enabled
0 = STOP mode disabled

COPD disables the COP module. See 

1 = COP module disabled
0 = COP module enabled

Address:

$001F

Bit  7

6

5

4

3

2

1

Bit  0

Read:

EDGE

BOTNEG

TOPNEG

INDEP

LVIRST

LVIPWR

STOPE

COPD

Write:

Reset:

0

0

0

0

1

1

0

0