Справочник Пользователя для SMSC LAN9500i

Hi-Speed USB 2.0 to 10/100 Ethernet Controller

Revision 1.7 (10-02-08)

32

SMSC LAN9500/LAN9500i

 

This is the total 5.5V input leakage for the entire device.

XI can optionally be driven from a 25MHz single-ended clock oscillator.

Measured at line side of transformer, line replaced by 100

Ω (+/- 1%) resistor.

Offset from 16nS pulse width at 50% of pulse peak.

Note 4.10 Measured differentially.

Min/max voltages guaranteed as measured with 100

Ω resistive load.

Peak Differential Output Voltage High

V

PPH

950

-

1050

mVpk

Peak Differential Output Voltage Low

V

PPL

-950

-

-1050

mVpk

Signal Amplitude Symmetry

V

SS

98

-

102

%

Signal Rise and Fall Time

T

RF

3.0

-

5.0

nS

Rise and Fall Symmetry

T

RFS

-

-

0.5

nS

Duty Cycle Distortion

D

CD

35

50

65

%

Overshoot and Undershoot

V

OS

-

-

5

%

Jitter

1.4

nS

Transmitter Peak Differential Output Voltage

V

OUT

2.2

2.5

2.8

V

Receiver Differential Squelch Threshold

V

DS

300

420

585

mV