Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD 数据表
产品代码
ATSAM4S-WPIR-RD
929
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
̶
Mode to Update the Synchronous Channels Registers after a Programmable Number of Periods
̶
Synchronous Channels Supports Connection of one Peripheral DMA Controller Channel (PDC) Which
Offers Buffer Transfer Without Processor Intervention To Update Duty-Cycle Registers
2 Independent Events Lines Intended to Synchronize ADC Conversions
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Programmable delay for Events Lines to delay ADC measurements
8 Comparison Units Intended to Generate Interrupts, Pulses on Event Lines and PDC Transfer Requests
8 Programmable Fault/Break Inputs Providing an Asynchronous Protection of PWM Outputs
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3 User Driven through PIO inputs
̶
PMC Driven when Crystal Oscillator Clock Fails
̶
ADC Controller Driven through Configurable Comparison Function
̶
Analog Comparator Controller Driven
̶
Timer/Counter Driven through Configurable Comparison Function
Write Protected Registers
39.3
Block Diagram
Figure 39-1.
Pulse Width Modulation Controller Block Diagram
APB
ADC
Comparison
Units
Interrupt
Controller
Interrupt Generator
event line 0
event line 1
event line 1
Events
Generator
event line x
Comparator
Clock
Selector
Counter
Channel 0
Duty-Cycle
Period
Update
APB
Interface
CLOCK
Generator
PIO
PMC
Dead-Time
Generator
Output
Override
Fault
Protection
PIO
Comparator
Dead-Time
Generator
Output
Override
Fault
Protection
Counter
Channel x
Duty-Cycle
Period
Update
Clock
Selector
Channel x
OCx
DTOHx
DTOLx
OOOHx
PWMHx
PWMLx
OOOLx
MUX
SY
N
C
x
PWM C
ontroller
MCK
Channel 0
OC0
DTOH0
DTOL0
OOOH0
PWMH0
PWML0
OOOL0
PWMHx
PWMLx
PWMH0
PWML0
PWMFI0
PWMFIx