Epson S1D13708 Benutzerhandbuch
Epson Research and Development
Page 19
Vancouver Design Center
Hardware Functional Specification
S1D13708
Issue Date: 02/03/07
X39A-A-001-02
3 Typical System Implementation Diagrams
.
Figure 3-1 Typical System Diagram (Generic #1 Bus)
.
Figure 3-2 Typical System Diagram (Generic #2 Bus)
S1D13708
FPLINE
FPFRAME
FPSHIFT
DRDY
FPDAT[15:0]
CL
K
I2
Oscillator
FPLINE
FPFRAME
FPSHIFT
MOD
D[15:0]
16-bit
Generic #1
BUS
BUS
RESET#
D[15:0]
RD0#
WAIT#
A[16:0]
BUSCLK
RD/WR#
AB[16:0]
DB[15:0]
WE1#
RD#
M/R#
CS#
CLKI
WAIT#
RESET#
A[27:17]
CS#
WE1#
GPO0
Decoder
WE0#
WE0#
Single
LCD
Display
Bia
s
P
o
w
e
r
BS#
IO V
DD
RD1#
S1D13708
FPLINE
FPFRAME
FPSHIFT
DRDY
FPDAT[8:0]
CL
KI2
Oscillator
FPLINE
FPFRAME
FPSHIFT
DRDY
D[8:0]
9-bit
Generic #2
BUS
BUS
RESET#
D[15:0]
RD#
WAIT#
A[16:0]
BUSCLK
RD/WR#
AB[16:0]
DB[15:0]
WE1#
RD#
M/R#
CS#
CLKI
WAIT#
RESET#
A[27:17]
CS#
BHE#
GPO0
Decoder
WE0#
WE#
TFT
Bi
a
s
P
o
w
e
r
BS#
Display
IO V
DD