Intel 253666-024US Benutzerhandbuch

3-394 Vol. 2A

FSTENV/FNSTENV—Store x87 FPU Environment

INSTRUCTION SET REFERENCE, A-M

#SS

If a memory operand effective address is outside the SS 

segment limit.

#NM

CR0.EM[bit 2] or CR0.TS[bit 3] = 1.

#UD 

If the LOCK prefix is used.

Virtual-8086 Mode Exceptions

#GP(0)

If a memory operand effective address is outside the CS, DS, 

ES, FS, or GS segment limit.

#SS(0)

If a memory operand effective address is outside the SS 

segment limit.

#NM

CR0.EM[bit 2] or CR0.TS[bit 3] = 1.

#PF(fault-code)

If a page fault occurs.

#AC(0)

If alignment checking is enabled and an unaligned memory 

reference is made.

#UD 

If the LOCK prefix is used.

Compatibility Mode Exceptions

Same exceptions as in protected mode.

64-Bit Mode Exceptions

#SS(0)

If a memory address referencing the SS segment is in a non-

canonical form.

#GP(0)

If the memory address is in a non-canonical form.

#NM

CR0.EM[bit 2] or CR0.TS[bit 3] = 1.

#MF 

If there is a pending x87 FPU exception.

#PF(fault-code)

If a page fault occurs.

#AC(0)

If alignment checking is enabled and an unaligned memory 

reference is made while the current privilege level is 3.

#UD 

If the LOCK prefix is used.