Intel 253666-024US Benutzerhandbuch
3-574 Vol. 2A
MAXPS—Return Maximum Packed Single-Precision Floating-Point Values
INSTRUCTION SET REFERENCE, A-M
MAXPS—Return Maximum Packed Single-Precision Floating-Point
Values
Description
Performs a SIMD compare of the packed single-precision floating-point values in the
destination operand (first operand) and the source operand (second operand), and
returns the maximum value for each pair of values to the destination operand. The
source operand can be an XMM register or a 128-bit memory location. The destina-
tion operand is an XMM register.
If the values being compared are both 0.0s (of either sign), the value in the second
operand (source operand) is returned. If a value in the second operand is an SNaN,
that SNaN is returned unchanged to the destination (that is, a QNaN version of the
SNaN is not returned).
If only one value is a NaN (SNaN or QNaN) for this instruction, the second operand
(source operand), either a NaN or a valid floating-point value, is written to the result.
If instead of this behavior, it is required that the NaN source operand (from either the
first or second operand) be returned, the action of MAXPS can be emulated using a
sequence of instructions, such as, a comparison followed by AND, ANDN and OR.
In 64-bit mode, use of the REX.R prefix permits this instruction to access additional
registers (XMM8-XMM15).
destination operand (first operand) and the source operand (second operand), and
returns the maximum value for each pair of values to the destination operand. The
source operand can be an XMM register or a 128-bit memory location. The destina-
tion operand is an XMM register.
If the values being compared are both 0.0s (of either sign), the value in the second
operand (source operand) is returned. If a value in the second operand is an SNaN,
that SNaN is returned unchanged to the destination (that is, a QNaN version of the
SNaN is not returned).
If only one value is a NaN (SNaN or QNaN) for this instruction, the second operand
(source operand), either a NaN or a valid floating-point value, is written to the result.
If instead of this behavior, it is required that the NaN source operand (from either the
first or second operand) be returned, the action of MAXPS can be emulated using a
sequence of instructions, such as, a comparison followed by AND, ANDN and OR.
In 64-bit mode, use of the REX.R prefix permits this instruction to access additional
registers (XMM8-XMM15).
Operation
DEST[31:0] ←
IF ((DEST[31:0]
=
0.0) and (SRC[31:0]
=
0.0))
THEN SRC[31:0];
ELSE IF (DEST[31:0]
ELSE IF (DEST[31:0]
=
SNaN) THEN SRC[31:0]; FI;
ELSE
IF
(SRC[31:0]
=
SNaN) THEN SRC[31:0]; FI;
ELSE IF (DEST[31:0]
>
SRC[31:0]); FI;
THEN DEST[31:0];
ELSE SRC[31:0]; FI; FI;
ELSE SRC[31:0]; FI; FI;
(* Repeat operation for 2nd and 3rd doublewords *);
DEST[127:64] ← IF
((DEST[127:96]
=
0.0) and (SRC[127:96]
=
0.0))
THEN SRC[127:96];
ELSE IF (DEST[127:96]
ELSE IF (DEST[127:96]
=
SNaN) THEN SRC[127:96];
ELSE
IF
(SRC[127:96]
=
SNaN) THEN SRC[127:96];
ELSE IF (DEST[127:96]
>
SRC[127:96])
Opcode
Instruction
64-Bit
Mode
Compat/
Leg Mode
Description
0F 5F /r
MAXPS xmm1,
xmm2/m128
Valid
Valid
Return the maximum single-precision
floating-point values between
xmm2/m128 and xmm1.