Intel 253666-024US Benutzerhandbuch

Vol. 2A 3-575

INSTRUCTION SET REFERENCE, A-M

MAXPS—Return Maximum Packed Single-Precision Floating-Point Values

THEN DEST[127:96]; 
ELSE SRC[127:96]; FI; FI;

Intel C/C++ Compiler Intrinsic Equivalent

MAXPS

__m128d _mm_max_ps(__m128d a, __m128d b)

SIMD Floating-Point Exceptions

Invalid (including QNaN source operand), Denormal.

Protected Mode Exceptions

#GP(0)

For an illegal memory operand effective address in the CS, DS, 

ES, FS or GS segments.

If a memory operand is not aligned on a 16-byte boundary, 

regardless of segment.

#SS(0)

If a memory operand effective address is outside the SS 

segment limit. 

#PF(fault-code) 

For a page fault.

#NM

If CR0.TS[bit 3] = 1.

#XM 

If an unmasked SIMD floating-point exception and CR4.OSXM-

MEXCPT[bit 10] = 1. 

#UD 

If an unmasked SIMD floating-point exception and CR4.OSXM-

MEXCPT[bit 10] = 0.

If CR0.EM[bit 2] = 1.
If CR4.OSFXSR[bit 9] = 0.
If CPUID.01H:EDX.SSE[bit 25] = 0.
If the LOCK prefix is used.

Real-Address Mode Exceptions

#GP(0)

If a memory operand is not aligned on a 16-byte boundary, 

regardless of segment.

If any part of the operand lies outside the effective address 

space from 0 to FFFFH.

#NM 

If CR0.TS[bit 3] = 1. 

#XM 

If an unmasked SIMD floating-point exception and CR4.OSXM-

MEXCPT[bit 10] = 1. 

#UD 

If an unmasked SIMD floating-point exception and CR4.OSXM-

MEXCPT[bit 10] = 0.

If CR0.EM[bit 2] = 1.
If CR4.OSFXSR[bit 9] = 0.