Fujitsu FR81S Benutzerhandbuch
CHAPTER 19: BASE TIMER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: BASE TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
58
5.4.6. Precautions for Using this Device
This section explains precautions for using this device.
Note the following when using the 16/32-bit reload timer:
Notes on Program Setting
⋅
Change the following bits of the base timer x timer control register (BTxTMCR) after stopping the
16-bit down counter by resetting CTEN bit to "0"(CTEN=0).
⋅
CKS2 to CKS0 bits
⋅
EGS1 and EGS0 bits
⋅
T32 bit
⋅
FMD2 to FMD0 bits
⋅
MDSE bit
⋅
All registers are initialized when the FMD2 to FMD0 bits of the timer control register (BTxTMCR) are
set to "000" to select reset mode.
⋅
Before the base timer function or T32 bit can be changed, the base timer must be reset once. Except
when rewriting the status of FMD2 to FMD0 bits or T32 bit of the timer control register (BTxTMCR)
after a reset, be sure to set the FMD2 to FMD0 bits to "000" to select the reset mode. Then, rewrite the
status of these bits.
Notes on Operations
⋅
If the count timing of the down counter and the load timing occur at the same time, the load operation is
given precedence.
⋅
If a 16/32-bit reload timer activation trigger is detected when counting ends in one-shot mode, the value
(cycle) set in the base timer x cycle setting register (BTxPCSR) is loaded to the 16-bit down counter,
which begins counting.
⋅
A different signal (external clock, external activation trigger, wave form) I/O operation can be selected
using the base timer I/O selection function.
Notes on Interrupts
⋅
If an instruction to clear the interrupt request flag and an instruction to change the interrupt request flag
to "1" occur at the same time, the flag clear instruction is ignored. The interrupt request flag is held to
"1".
MB91520 Series
MN705-00010-1v0-E
691