Texas Instruments TMS320C64x DSP Benutzerhandbuch
Video Display Registers
Video Display Port
4-84
SPRU629
4.12.22
Video Display Display Event Register (VDDISPEVT)
The video display display event register (VDDISPEVT) is programmed with
the number of DMA events to be generated for display field 1 and field 2. The
VDDISPEVET is shown in Figure 4–60 and described in Table 4–27.
the number of DMA events to be generated for display field 1 and field 2. The
VDDISPEVET is shown in Figure 4–60 and described in Table 4–27.
Figure 4–60. Video Display Display Event Register (VDDISPEVT)
31
28
27
16
Reserved
DISPEVT2
R-0
R/W-0
15
12
11
0
Reserved
DISPEVT1
R-0
R/W-0
Legend: R = Read only; R/W = Read/Write; -n = value after reset
Table 4–27. Video Display Display Event Register (VDDISPEVT) Field Descriptions
Description
Bit
field
†
symval
†
Value
BT.656 and Y/C Mode
Raw Data Mode
31–28
Reserved
–
0
Reserved. The reserved bit location is always read as 0. A
value written to this field has no effect.
value written to this field has no effect.
27–16
DISPEVT2
OF(value)
0–FFFh
Specifies the number of DMA
event sets (YEVT, CbEVT,
CrEVT) to be generated for
field 2 output.
event sets (YEVT, CbEVT,
CrEVT) to be generated for
field 2 output.
Specifies the number of DMA
events (YEVT) to be
generated for field 2 output.
events (YEVT) to be
generated for field 2 output.
15–12
Reserved
–
0
Reserved. The reserved bit location is always read as 0. A
value written to this field has no effect.
value written to this field has no effect.
11–0
DISPEVT1
OF(value)
0–FFFh
Specifies the number of DMA
event sets (YEVT, CbEVT,
CrEVT) to be generated for
field 1 output.
event sets (YEVT, CbEVT,
CrEVT) to be generated for
field 1 output.
Specifies the number of DMA
events (YEVT) to be
generated for field 1 output.
events (YEVT) to be
generated for field 1 output.
† For CSL implementation, use the notation VP_VDDISPEVT_DISPEVTn_symval