Texas Instruments TMS320C64x DSP Benutzerhandbuch
VIC Port Registers
VCXO Interpolated Control Port
6-8
SPRU629
6.5.2
VIC Input Register (VICIN)
The DSP writes the input bits for VCXO interpolated control in the VIC input
register (VICIN). The DSP decides how often to update VICIN. The DSP can
write to VICIN only when the GO bit in the VIC control register (VICCTL) is set
to 1. The VIC module uses the MSBs of VICIN for precision values less than
16. The VICIN is shown in Figure 6–4 and described in Table 6–5.
register (VICIN). The DSP decides how often to update VICIN. The DSP can
write to VICIN only when the GO bit in the VIC control register (VICCTL) is set
to 1. The VIC module uses the MSBs of VICIN for precision values less than
16. The VICIN is shown in Figure 6–4 and described in Table 6–5.
Figure 6–4. VIC Input Register (VICIN)
31
16
Reserved
R-0
15
0
VICINBITS
R/W-0
Legend: R = Read only; R/W = Read/Write; -n = value after reset
Table 6–5. VIC Input Register (VICIN) Field Descriptions
Bit
Field
symval
†
Value
Description
31–16
Reserved
–
0
Reserved. The reserved bit location is always read as 0. A
value written to this field has no effect.
value written to this field has no effect.
15–0
VICINBITS
OF(value)
0–FFFFh
The DSP writes the input bits for VCXO interpolated control
to the VIC input bits.
to the VIC input bits.
† For CSL implementation, use the notation VIC_VICIN_VICINBITS_symval